CS 505: Computer Structures

Time: W 6:10-8:50pm
Place: CoRE A

Instructor: Thu D. Nguyen
Email: tdnguyen@cs.rutgers.edu
Office Hours: Tuesday 1:30-2:30pm
Office: CoRE 326

TA: Kien Le
Email: lekien@paul.rutgers.edu
Office Hours: Friday 10-11am
Office: Hill 411

Announcements

• Final exam will be 5/11, 6:30pm-9:30pm, CoRE A (normal lecture room).  Open book exam.
• If you are interested in listening to the recorded lecture, go to http://lecture123.com, create yourself an account, and join the Rutgers-cs505-s05 community.  The key for this community (you need this to join) is 123abc!.

Logistics

WebCT

Acknowledgements

• Lecture slides are based largely on John D. Kubiatowicz's UC Berkeley 252 slides.
• The programming part of HW2 was borrowed from Daniel Jimenez's CS505.

Homeworks

• HW1
• HW2
• HW3
• Suggested problems from the book to practice with for Final.  Don't have to hand in.
  

Schedule:

1/19 Introduction

• Lecture slides
• Readings
  • H&P Chapter 1.
  • G.E. Moore, Cramming more components onto integrated circuits, Electronics, pp. 114-117, April, 1965.

1/26 & 2/2 Processor Instruction Set Principles & Pipelining

• Lecture slides
• Readings
  • H&P Chapter 2 (can skip the sections on DSPs) and Appendix A.
  • [1/26] Patterson and Sequin. RISC I: A Reduced Instruction Set VLSI Computer. In Proceedings of ISCA, 1981. Retrospective.
    • Optional related reading: Patterson and Ditzel. The Case for the Reduced Instruction Set Computer. ACM Computer Architecture News, 8(6): 25-33, Oct. 1980.
    • Presenter: Kiranmayi Rani
  • [2/2] Smith and Pleszkun. Implementation of Precise Interrupts in Pipelined Processors. In Proceedings of ISCA, 1985. Retrospective.
    • Presenter: Omar Khan

2/9 Whoops, had to cancel class

2/16 Instruction-Level Parallelism

• Lecture slides (Branch prediction slides)
• Readings
  • H&P Chapter 3.
  • [2/16] Tullsen, Eggers, and Levy. Simultaneous Multithreading: Maximizing On-Chip Parallelism. In Proceedings of ISCA, 1995. Retrospective.
    • Presenter: Rashmi Manjunath

2/23 & 3/2 Caches

• Lecture slides
• Readings
  • H&P Chapter 5 (through 5.7)
  • [3/2] N.P. Jouppi, Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers, Proceedings of the 17th Annual Symposium on Computer Architecture, June 1990.
    • Optional background reading: A.J. Smith, Cache memories, ACM Computing Surveys, 14(3):473-530, September, 1982.
    • Presenter: Wei Zheng
  • [3/2] Yeh and Patt. Alternative implementations of two-level adaptive training branch prediction. In Proceedings of ISCA, 1992.
    • This got pushed to this date because of class cancellation on 2/9 and Steve's traveling on 2/16&23.
    • Presenter: Steve Vaccaro

3/9 Midterm

3/16 Springbreak

3/23 Processor Architectures

• Readings
  • R. Kessler, The Alpha 21264 microprocessor, IEEE micro 19(2):24-36, March, 1999.
    • Presenter: Lu Han
  • J. M. Tendler, J. S. Dodson, J. S. Fields, Jr., H. Le, and B. Sinharoy POWER4 system microarchitecture, IBM Journal of Research and Development, 46(1):5-26, 2002
    • Presenter: Pravin Shankar

3/30 Memory and Disk

• Lecture slides
• Readings
  • H&P Chapter 5 & 7
  • V. Cuppu, B. Jacob, B. Davis, and T. Mudge, A performance comparison of contemporary DRAM architectures, Proceedings of the International Symposium on Computer Architecture, pp. 222-233, May, 1999.
    • Presenter:

4/6 Disk (RAID) ... moving on to Multiprocessors

• Lecture slides
• Readings
  • H&P Chapter 6 and 8
  • D.A. Patterson, G. Gibson, and R. Katz, A case for redundant arrays of inexpensive disks (RAID), Proceedings of the ACM SIGMOD Conference, June, 1988. 
    • Presenter: Pravin Shankar

4/13 Multiprocessors & Networking

4/20 Multiprocessors & Networking

• Lecture slides
• Readings
  • D. Lenoski, J. Laudon, K. Gharachorloo, W.-D. Weber, A. Gupta, J. Hennessy, M. Horowitz, and M. Lam, The Stanford Dash multiprocessor, IEEE Computer, 25(3) 63-79, 1992. 
    • Presenter:
  • Agarwal, Bianchini, Chaiken, Chong, Johnson, Kranz, Kubiatowicz, Lim, Mackenzie, and Yeung. The MIT Alewife Machine. Proceedings of the IEEE, special issue on Distributed Shared-Memory Systems, March 1999.
    • Presenter:
  • Metcalfe and Boggs. Ethernet: Distributed Packet Switching for Local Computer Networks. Communications of the ACM, 19(7): 395-404.
    • Presenter: Wess

4/27 Fault Tolerance

• Lecture slides
• Readings
  • Fault Tolerance in Tandem Computer Systems.
  • Gray. A Census of Tandem System Availability Between 1985 and 1990. IEEE Transactions on Reliability, 1990.
    • Note: This set of two papers go together and will be presented together. Both papers are quite easy to read.